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Travelled to:
1 × USA
Collaborated with:
W.H.Kao C.Lee
Talks about:
transistor (1) algorithm (1) circuit (1) automat (1) digit (1) size (1) cmos (1)

Person: Nader Fathi

DBLP DBLP: Fathi:Nader

Contributed to:

DAC 19851985

Wrote 1 papers:

DAC-1985-KaoFL #algorithm #automation
Algorithms for automatic transistor sizing in CMOS digital circuits (WHK, NF, CHL), pp. 781–784.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.