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Travelled to:
3 × USA
Collaborated with:
N.Fathi C.Lee M.H.Movahed-Ezazi M.L.Sabiers B.G.Arsintescu E.Charbon E.Malavasi U.Choudhury
Talks about:
circuit (2) transistor (1) constraint (1) transform (1) algorithm (1) workstat (1) schemat (1) general (1) automat (1) system (1)

Person: William H. Kao

DBLP DBLP: Kao:William_H=

Contributed to:

DAC 19981998
DAC 19851985
DAC 19841984

Wrote 3 papers:

DAC-1998-ArsintescuCMCK #constraints
General AC Constraint Transformation for Analog ICs (BGA, EC, EM, UC, WHK), pp. 38–43.
DAC-1985-KaoFL #algorithm #automation
Algorithms for automatic transistor sizing in CMOS digital circuits (WHK, NF, CHL), pp. 781–784.
DAC-1984-KaoMS #design #named
ARIES: A workstation based, schematic driven system for circuit design (WHK, MHME, MLS), pp. 301–307.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.