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Travelled to:
1 × USA
Collaborated with:
H.Hua C.Mineo K.Schoenfliess A.M.Sule S.Melamed W.R.Davis
Talks about:
temperatur (1) dimension (1) compromis (1) circuit (1) integr (1) explor (1) three (1) power (1) among (1) time (1)

Person: Ravi Jenkal

DBLP DBLP: Jenkal:Ravi

Contributed to:

DAC 20062006

Wrote 1 papers:

DAC-2006-HuaMSSMJD #3d
Exploring compromises among timing, power and temperature in three-dimensional integrated circuits (HH, CM, KS, AMS, SM, RJ, WRD), pp. 997–1002.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.