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Travelled to:
1 × Mexico
1 × Spain
2 × USA
Collaborated with:
M.Valero M.Fernández J.Corbal F.Quintana L.Villa D.A.Padua M.Jiménez E.Ayguadé
Talks about:
vector (5) architectur (3) decoupl (2) dlp (2) multithread (1) processor (1) workload (1) paradigm (1) quantit (1) generat (1)

Person: Roger Espasa

DBLP DBLP: Espasa:Roger

Contributed to:

HPCA 20042004
HPCA 20012001
PDP 19981998
HPCA 19971997
HPCA 19961996
PDP 19951995

Wrote 7 papers:

HPCA-2004-FernandezE #memory management
Link-Time Path-Sensitive Memory Redundancy Elimination (MF, RE), pp. 300–310.
HPCA-2001-CorbalEV #generative
DLP + TLP Processors for the Next Generation of Media Workloads (JC, RE, MV), pp. 219–228.
PDP-1998-QuintanaEV #paradigm
A case for merging the ILP and DLP paradigms (FQ, RE, MV), pp. 217–224.
PDP-1998-VillaEV #architecture #effectiveness
Effective usage of vector registers in decoupled vector architectures (LV, RE, MV), pp. 495–501.
HPCA-1997-EspasaV #architecture #parallel #thread
Multithreaded Vector Architectures (RE, MV), pp. 237–248.
HPCA-1996-EspasaV #architecture
Decoupled Vector Architectures (RE, MV), pp. 281–290.
PDP-1995-EspasaVPJA #analysis
Quantitative analysis of vector code (RE, MV, DAP, MJ, EA), pp. 452–463.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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