Travelled to:
2 × USA
Collaborated with:
N.Matsumoto J.Dao T.Hamai C.Ogawa Y.Watanabe K.Usami Y.Sugeno H.Hatada
Talks about:
layout (2) datapath (1) generat (1) compact (1) symbol (1) method (1) level (1) vlsi (1) gate (1) full (1)
Person: Shojiro Mori
DBLP: Mori:Shojiro
Contributed to:
Wrote 2 papers:
- DAC-1993-DaoMHOM
- A Compaction Method for Full Chip VLSI Layouts (JD, NM, TH, CO, SM), pp. 407–412.
- DAC-1990-MatsumotoWUSHM #generative #layout
- Datapath Generator Based on Gate-Level Symbolic Layout (NM, YW, KU, YS, HH, SM), pp. 388–393.