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Travelled to:
2 × USA
Collaborated with:
N.Matsumoto J.Dao T.Hamai C.Ogawa Y.Watanabe K.Usami Y.Sugeno H.Hatada
Talks about:
layout (2) datapath (1) generat (1) compact (1) symbol (1) method (1) level (1) vlsi (1) gate (1) full (1)

Person: Shojiro Mori

DBLP DBLP: Mori:Shojiro

Contributed to:

DAC 19931993
DAC 19901990

Wrote 2 papers:

DAC-1993-DaoMHOM
A Compaction Method for Full Chip VLSI Layouts (JD, NM, TH, CO, SM), pp. 407–412.
DAC-1990-MatsumotoWUSHM #generative #layout
Datapath Generator Based on Gate-Level Symbolic Layout (NM, YW, KU, YS, HH, SM), pp. 388–393.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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