Stem datapath$ (all stems)

56 papers:

DAC-2015-CampbellVPC #detection #fault #low cost #synthesis

High-level synthesis of error detecting cores through low-cost modulo-3 shadow datapaths (KAC, PV, DZP, DC), p. 6.

DAC-2014-ShiBSBC #online #synthesis #trade-off

Datapath Synthesis for Overclocking: Online Arithmetic for Latency-Accuracy Trade-offs (KS, DB, EAS, SB, GAC), p. 6.

CAV-2014-LeeS #abstraction #approximate #bound #reachability #scalability #verification

Unbounded Scalable Verification Based on Approximate Property-Directed Reachability and Datapath Abstraction (SL, KAS), pp. 849–865.

DATE-2013-ChenZ #design #optimisation

Resource-constrained high-level datapath optimization in ASIP design (YC, HZ), pp. 198–201.

DATE-2013-XydisPS #configuration management

Thermal-aware datapath merging for coarse-grained reconfigurable processors (SX, GP, CS), pp. 1649–1654.

DAC-2012-ChouHC #design

Structure-aware placement for datapath-intensive circuit designs (SC, MKH, YWC), pp. 762–767.

DAC-2012-WardDP #automation #evaluation #learning #named

PADE: a high-performance placer with automatic datapath extraction and evaluation through high dimensional data learning (SIW, DD, DZP), pp. 756–761.

DATE-2012-SheHMC #architecture #energy #scheduling

Scheduling for register file energy minimization in explicit datapath architectures (DS, YH, BM, HC), pp. 388–393.

DATE-2012-StojilovicNSBI #flexibility

Selective flexibility: Breaking the rigidity of datapath merging (MS, DN, LS, PB, PI), pp. 1543–1548.

DATE-2011-BarrioMMMH #optimisation

Power optimization in heterogenous datapaths (AADB, SOM, MCM, JMM, RH), pp. 1400–1405.

HPCA-2011-GovindarajuHS #energy #performance

Dynamically Specialized Datapaths for energy efficient computing (VG, CHH, KS), pp. 503–514.

DAC-2010-NurvitadhiHLK #automation #parallel #pipes and filters #specification #synthesis #thread #transaction

Automatic multithreaded pipeline synthesis from transactional datapath specifications (EN, JCH, SLL, TK), pp. 314–319.

DATE-2010-NurvitadhiHKL #automation #pipes and filters #specification #transaction

Automatic pipelining from transactional datapath specifications (EN, JCH, TK, SLL), pp. 1001–1004.

DAC-2009-SarbisheiAF #clustering #heuristic #optimisation #polynomial #using

Polynomial datapath optimization using partitioning and compensation heuristics (OS, BA, MF), pp. 931–936.

DATE-2009-MilderHP #automation #generative #permutation #streaming

Automatic generation of streaming datapaths for arbitrary fixed permutations (PAM, JCH, MP), pp. 1118–1123.

DAC-2008-MilderFHP #implementation #representation

Formal datapath representation and manipulation for implementing DSP transforms (PAM, FF, JCH, MP), pp. 385–390.

CGO-2008-FanPKM #hardware #reuse #scheduling

Modulo scheduling for highly customized datapaths to increase hardware reusability (KF, HP, MK, SAM), pp. 124–133.

DATE-2006-GandhiM #energy #multi #using

Exploiting data-dependent slack using dynamic multi-VDD to minimize energy consumption in datapath circuits (KRG, NRM), pp. 1001–1006.

DATE-2006-MohantyVK #optimisation

Physical-aware simulated annealing optimization of gate leakage in nanoscale datapath circuits (SPM, RV, EK), pp. 1191–1196.

DATE-2006-ShekharKE #equivalence #multi #verification

Equivalence verification of arithmetic datapaths with multiple word-length operands (NS, PK, FE), pp. 824–829.

DATE-DF-2004-BoschettiSB #architecture #configuration management #image #runtime

A Run-Time Reconfigurable Datapath Architecture for Image Processing Applications (MRB, ISS, SB), pp. 242–247.

CGO-2004-KudlurFCRCM #heuristic #named #scheduling

FLASH: Foresighted Latency-Aware Scheduling Heuristic for Processors with Customized Datapaths (MK, KF, MLC, RAR, NC, SAM), pp. 201–212.

LCTES-2004-PokamRSB #energy #optimisation

Speculative software management of datapath-width for energy optimization (GP, OR, AS, FB), pp. 78–87.

DATE-2003-OikonomakosZA #metric #online #self #synthesis #testing #using

Versatile High-Level Synthesis of Self-Checking Datapaths Using an On-Line Testability Metric (PO, MZ, BMAH), pp. 10596–10601.

DAC-2002-HuangM #configuration management #parallel

Exploiting operation level parallelism through dynamically reconfigurable datapaths (ZH, SM), pp. 337–342.

DATE-2002-AbkeB #automaton #implementation

A Direct Mapping System for Datapath Module and FSM Implementation into LUT-Based FPGAs (JA, EB), p. 1085.

DAC-2001-LapinskiiJV #clustering

High-Quality Operation Binding for Clustered VLIW Datapaths (VSL, MFJ, GdV), pp. 702–707.

DAC-2001-MathurS #analysis #precise #using

Improved Merging of Datapath Operators using Information Content and Required Precision Analysis (AM, SS), pp. 462–467.

DATE-2001-ConstantinidesCL #heuristic #multi

Heuristic datapath allocation for multiple wordlength systems (GAC, PYKC, WL), pp. 791–797.

DATE-2001-HuangM #configuration management #design #network #using

Managing dynamic reconfiguration overhead in systems-on-a-chip design using reconfigurable datapaths and optimized interconnection networks (ZH, SM), p. 735.

DATE-2001-SerdarS #automation

Automatic datapath tile placement and routing (TS, CS), pp. 552–559.

DAC-2000-NemaniT #design

Macro-driven circuit design methodology for high-performance datapaths (MN, VT), pp. 661–666.

DAC-2000-NouraniCP

Synthesis-for-testability of controller-datapath pairs that use gated clocks (MN, JC, CAP), pp. 613–618.

DATE-2000-GizopoulosKPPZ #effectiveness #power management

Effective Low Power BIST for Datapaths (DG, NK, MP, AMP, YZ), p. 757.

DATE-2000-GoodbyO #fault #quality

Test Quality and Fault Risk in Digital Filter Datapath BIST (LG, AO), pp. 468–475.

DATE-2000-MunchWWMS #automation #power management

Automating RT-Level Operand Isolation to Minimize Power Consumption in Datapaths (MM, NW, BW, RM, JS), pp. 624–631.

DAC-1999-YimK #design

Reducing Cross-Coupling Among Interconnect Wires in Deep-Submicron Datapath Design (JSY, CMK), pp. 485–490.

DATE-1999-CarlettaNP #synthesis #testing

Synthesis of Controllers for Full Testability of Integrated Datapath-Controller Pairs (JC, MN, CAP), pp. 278–282.

DATE-1999-HamiltonOH

Self Recovering Controller and Datapath Codesign (SNH, AO, AH), pp. 596–601.

DATE-1999-JochensKSN #component #megamodelling

A New Parameterizable Power Macro-Model for Datapath Components (GJ, LK, ES, WN), p. 29–?.

DAC-1998-IenneG #case study #design #experience #question #standard #tool support

Practical Experiences with Standard-Cell Based Datapath Design Tools: Do We Really Need Regular Layouts? (PI, AG), pp. 396–401.

DAC-1998-McGrawAK #design #pipes and filters #top-down

A Top-Down Design Environment for Developing Pipelined Datapaths (RMM, JHA, RHK), pp. 236–241.

DATE-1998-FlottesPRV #effectiveness #performance

Scanning Datapaths: A Fast and Effective Partial Scan Selection Technique (MLF, RP, BR, LV), pp. 921–922.

DAC-1997-NouraniCP #fault #testing

A Scheme for Integrated Controller-Datapath Fault Testing (MN, JC, CAP), pp. 546–551.

EDTC-1997-CrenshawS #estimation

Accurate high level datapath power estimation (JEC, MS), pp. 590–596.

HPCA-1997-WolfeFDF #design #video

Datapath Design for a VLIW Video Signal Processor (AW, JF, SD, ESTF), pp. 24–35.

CAV-1997-KamhiWF #automation #performance

Automatic Datapath Extraction for Efficient Usage of HDD (GK, OW, LF), pp. 95–106.

DAC-1996-GoodbyO #pseudo

Pseudorandom-Pattern Test Resistance in High-Performance DSP Datapaths (LG, AO), pp. 813–818.

DAC-1996-Koch

Module Compaction in FPGA-based Regular Datapaths (AK), pp. 471–476.

DAC-1995-ZhouB #canonical #equivalence

Equivalence Checking of Datapaths Based on Canonical Arithmetic Expressions (ZZ, WB), pp. 546–551.

CAV-1995-HojatiB #abstraction #automation #hardware

Automatic Datapath Abstraction In Hardware Systems (RH, RKB), pp. 98–113.

DAC-1993-NouraniP #algorithm #estimation #layout

A Layout Estimation Algorithm for RTL Datapaths (MN, CAP), pp. 285–291.

DAC-1991-ChenM #pipes and filters #scheduling

Datapath Scheduling for Two-Level Pipelining (CYRC, MZM), pp. 603–606.

DAC-1990-MatsumotoWUSHM #generative #layout

Datapath Generator Based on Gate-Level Symbolic Layout (NM, YW, KU, YS, HH, SM), pp. 388–393.

DAC-1986-MarshburnLBCLC #assembly #named

DATAPATH: a CMOS data path silicon assembler (TM, IL, RB, DC, GL, PC), pp. 722–729.

DAC-1986-ParkerPM #named #synthesis

MAHA: a program for datapath synthesis (ACP, JTP, MJM), pp. 461–466.