BibSLEIGH corpus
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Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
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Travelled to:
1 × Germany
2 × France
Collaborated with:
H.Ying K.Hofmann F.A.Samman M.Glesner C.Schneider M.Kayss J.Deicke
Talks about:
architectur (2) algorithm (2) network (2) chip (2) comparison (1) multicast (1) irregular (1) dimension (1) structur (1) parallel (1)

Person: Thomas Hollstein

DBLP DBLP: Hollstein:Thomas

Contributed to:

DATE 20132013
DATE 20082008
DATE 19981998

Wrote 3 papers:

DATE-2013-YingHH #3d #performance
Fast and optimized task allocation method for low vertical link density 3-dimensional networks-on-chip based many core systems (HY, TH, KH), pp. 1777–1782.
DATE-2008-SammanHG #architecture #parallel #pipes and filters
Multicast Parallel Pipeline Router Architecture for Network-on-Chip (FAS, TH, MG), pp. 1396–1401.
DATE-1998-SchneiderKHD #algorithm #architecture #comparison #hardware
From Algorithms to Hardware Architectures: A Comparison of Regular and Irregular Structured IDCT Algorithms (CS, MK, TH, JD), pp. 186–190.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.