Collaborated with:
J.Zhai X.Qian W.Chen
Talks about:
architectur (1) explicit (1) messag (1) plock (1) inter (1) pass (1) lock (1) fast (1) core (1)
Person: Xiongchao Tang
DBLP: Tang:Xiongchao
Contributed to:
Wrote 1 papers:
- ASPLOS-2019-TangZQC #architecture #message passing #named #performance
- pLock: A Fast Lock for Architectures with Explicit Inter-core Message Passing (XT, JZ, XQ, WC), pp. 765–778.