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Travelled to:
1 × USA
Collaborated with:
M.Renaudin R.Leveugle
Talks about:
transient (1) asynchron (1) circuit (1) sensit (1) fault (1) evalu (1)

Person: Yannick Monnet

DBLP DBLP: Monnet:Yannick

Contributed to:

DAC 20052005

Wrote 1 papers:

DAC-2005-MonnetRL #evaluation #fault
Asynchronous circuits transient faults sensitivity evaluation (YM, MR, RL), pp. 863–868.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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