Travelled to:
1 × China
1 × India
1 × Italy
1 × Japan
1 × The Netherlands
3 × USA
Collaborated with:
C.R.Ramakrishnan S.A.Smolka I.V.Ramakrishnan G.Pemmasani H.Guo X.Du C.Ling L.Hua A.Roychoudhury P.Yang D.S.Warren V.N.Venkatakrishnan Y.S.Ramakrishna O.Sokolsky E.W.Stark B.Cui K.N.Kumar
Talks about:
program (4) logic (4) model (3) check (3) justif (2) explor (2) verif (2) onlin (2) tool (2) tabl (2)
Person: Yifei Dong
DBLP: Dong:Yifei
Contributed to:
Wrote 8 papers:
- HCI-MIE-2007-DongLH #complexity #segmentation #user interface
- Effect of Glance Duration on Perceived Complexity and Segmentation of User Interfaces (YD, CL, LH), pp. 605–614.
- PADL-2005-YangDRS #compilation #mobile #model checking #performance #process
- A Provably Correct Compiler for Efficient Model Checking of Mobile Processes (PY, YD, CRR, SAS), pp. 113–127.
- FLOPS-2004-PemmasaniGDRR #logic programming #online #source code
- Online Justification for Tabled Logic Programs (GP, HFG, YD, CRR, IVR), pp. 24–38.
- CAV-2003-DongRS #model checking #proving
- Evidence Explorer: A Tool for Exploring Model-Checking Proofs (YD, CRR, SAS), pp. 215–218.
- ICLP-2003-PemmasaniGDRR #logic programming #online #source code
- Online Justification for Tabled Logic Programs (GP, HFG, YD, CRR, IVR), pp. 500–501.
- CAV-2000-RamakrishnanRSDDRV #named #tool support #verification
- XMC: A Logic-Programming-Based Verification Toolset (CRR, IVR, SAS, YD, XD, AR, VNV), pp. 576–580.
- TACAS-1999-DongDRRRSSSW #case study #comparative #concurrent #tool support #verification
- Fighting Livelock in the i-Protocol: A Comparative Study of Verification Tools (YD, XD, YSR, CRR, IVR, SAS, OS, EWS, DSW), pp. 74–88.
- ALP-PLILP-1998-CuiDDKRRRSW #logic programming #model checking
- Logic Programming and Model Checking (BC, YD, XD, KNK, CRR, IVR, AR, SAS, DSW), pp. 1–20.