Travelled to:
2 × USA
Collaborated with:
K.Cheng Y.Hsu F.Tsai W.Jong
Talks about:
referenti (1) implement (1) arithmet (1) silicon (1) circuit (1) visibl (1) enhanc (1) verif (1) level (1) debug (1)
Person: Ying-Tsai Chang
DBLP: Chang:Ying=Tsai
Contributed to:
Wrote 2 papers:
- DAC-2006-HsuTJC #debugging
- Visibility enhancement for silicon debug (YCH, FST, WJ, YTC), pp. 13–18.
- DAC-2002-ChangC #implementation #self #verification
- Self-referential verification of gate-level implementations of arithmetic circuits (YTC, KTC), pp. 311–316.