Collaborated with:Y.Jiang M.Gu J.Sun Y.J.0001 M.G.0001 J.Sun J.Gao H.Liu
Talks about:model (2) statement (1) stateflow (1) simulink (1) automata (1) approach (1) softwar (1) languag (1) verifi (1) time (1)
Person: Yixiao Yang
DBLP: Yang:Yixiao
Contributed to:
20162017Wrote 2 papers:
- ASE-2016-YangJGS #approach #automaton #verification
- Verifying simulink stateflow model: timed automata approach (YY, YJ, MG, JGS), pp. 852–857.
- ASE-2017-YangJ0SGL
- A language model for statements of software code (YY, YJ0, MG0, JS, JG, HL), pp. 682–687.