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Travelled to:
1 × France
1 × Germany
1 × Japan
Collaborated with:
K.Sakanushi M.Imai M.A.Hassan K.Ueda M.Ito I.Fujita M.Hoshinao T.Uchida
Talks about:
system (2) base (2) architectur (1) perform (1) pattern (1) circuit (1) analysi (1) kernel (1) simul (1) print (1)

Person: Yoshinori Takeuchi

DBLP DBLP: Takeuchi:Yoshinori

Contributed to:

DATE 20052005
DATE v2 20042004
ICDAR 19931993

Wrote 3 papers:

DATE-2005-HassanSTI #kernel #simulation
RTK-Spec TRON: A Simulation Model of an ITRON Based RTOS Kernel in SystemC (MAH, KS, YT, MI), pp. 554–559.
DATE-v2-2004-UedaSTI #architecture #embedded #estimation #performance
Architecture-Level Performance Estimation for IP-Based Embedded Systems (KU, KS, YT, MI), pp. 1002–1007.
ICDAR-1993-ItoTFHU #analysis #evaluation
Pattern analysis and evaluation of printed circuit boards (MI, YT, IF, MH, TU), pp. 798–801.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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