Travelled to:
1 × France
1 × Germany
1 × USA
Collaborated with:
K.Sakanushi Y.Takeuchi M.A.Hassan K.Ueda N.Bình A.Shiomi N.Hikichi
Talks about:
system (2) base (2) architectur (1) algorithm (1) softwar (1) pipelin (1) perform (1) hardwar (1) partit (1) kernel (1)
Person: Masaharu Imai
DBLP: Imai:Masaharu
Contributed to:
Wrote 3 papers:
- DATE-2005-HassanSTI #kernel #simulation
- RTK-Spec TRON: A Simulation Model of an ITRON Based RTOS Kernel in SystemC (MAH, KS, YT, MI), pp. 554–559.
- DATE-v2-2004-UedaSTI #architecture #embedded #estimation #performance
- Architecture-Level Performance Estimation for IP-Based Embedded Systems (KU, KS, YT, MI), pp. 1002–1007.
- DAC-1996-BinhISH #algorithm #clustering #design #hardware #pipes and filters
- A Hardware/Software Partitioning Algorithm for Designing Pipelined ASIPs with Least Gate Counts (NNB, MI, AS, NH), pp. 527–532.