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Travelled to:
1 × France
Collaborated with:
N.Njoroge J.Casper S.Wee D.Ge C.Kozyrakis K.Olukotun
Talks about:
multiprocessor (1) transact (1) support (1) memori (1) atlas (1) chip (1)

Person: Yuriy Teslyar

DBLP DBLP: Teslyar:Yuriy

Contributed to:

DATE 20072007

Wrote 1 papers:

DATE-2007-NjorogeCWTGKO #memory management #multi #named #transaction
ATLAS: a chip-multiprocessor with transactional memory support (NN, JC, SW, YT, DG, CK, KO), pp. 3–8.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.