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Travelled to:
1 × Germany
Collaborated with:
A.U.Diril A.Chatterjee
Talks about:
nanomet (1) circuit (1) analysi (1) toler (1) optim (1) error (1) soft (1)

Person: Yuvraj Singh Dhillon

DBLP DBLP: Dhillon:Yuvraj_Singh

Contributed to:

DATE 20052005

Wrote 1 papers:

DATE-2005-DhillonDC #analysis #optimisation
Soft-Error Tolerance Analysis and Optimization of Nanometer Circuits (YSD, AUD, AC), pp. 288–293.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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