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model (6)
chang (6)
time (5)
algorithm (4)
date (4)

Stem due$ (all stems)

33 papers:

ICEISICEIS-v1-2015-AwasthiLK #algorithm #linear #problem #sequence #strict
Un-restricted Common Due-Date Problem with Controllable Processing Times — Linear Algorithm for a Given Job Sequence (AA, JL, OK), pp. 526–534.
KDDKDD-2015-FeldmanNPR #mining #online #predict
Utilizing Text Mining on Online Medical Forums to Predict Label Change due to Adverse Drug Reactions (RF, ON, AP, BR), pp. 1779–1788.
ICSEICSE-2014-DouCW #ambiguity #detection #smell #spreadsheet
Is spreadsheet ambiguity harmful? detecting and repairing spreadsheet smells due to ambiguous computation (WD, SCC, JW), pp. 848–858.
CASECASE-2013-LiJJ #algorithm #heuristic
A heuristic algorithm for minimizing total absolute deviation from distinct due dates on a single machine (YL, ZJ, WJ), pp. 392–397.
FASEFASE-2013-SalayGC #co-evolution #nondeterminism
Change Propagation due to Uncertainty Change (RS, JG, MC), pp. 21–36.
SACSAC-2013-MouraMNS #named #network #novel
ABOI: a novel strategy to mitigate the blocking due to outdated information in OCS/OBS network (IM, FM, JMN, ACBS), pp. 640–645.
HPCAHPCA-2013-SandbergSHB #modelling #performance
Modeling performance variation due to cache sharing (AS, AS, EH, DBS), pp. 155–166.
ICSTICST-2012-GargD #database #testing #web
Test Case Prioritization Due to Database Changes in Web Applications (DG, AD), pp. 726–730.
DATEDATE-2011-ChandraA
Analytical model for SRAM dynamic write-ability degradation due to gate oxide breakdown (VC, RCA), pp. 1172–1175.
DATEDATE-2011-MerrettAWZRMRLFA #analysis #modelling #monte carlo #performance #statistics #variability
Modelling circuit performance variations due to statistical variability: Monte Carlo static timing analysis (MM, PA, YW, MZ, DR, CM, SR, ZL, SBF, AA), pp. 1537–1540.
HCIDHM-2011-LaquaiDR #behaviour #modelling
Impact and Modeling of Driver Behavior Due to Cooperative Assistance Systems (FL, MD, GR), pp. 473–482.
DACDAC-2010-XieDS
Post-silicon diagnosis of segments of failing speedpaths due to manufacturing variations (LX, AD, KKS), pp. 274–279.
DATEDATE-2010-DasMZC #detection #hardware #information management #memory management
Detecting/preventing information leakage on the memory bus due to malicious hardware (AD, GM, JZ, ANC), pp. 861–866.
HPCAHPCA-2010-BiswasRMACJPPS #metric #using
Explaining cache SER anomaly using DUE AVF measurement (AB, CR, SSM, VA, LC, AJ, AEP, MP, NS), pp. 1–12.
RERE-2009-Breaux #approach #requirements
Exercising Due Diligence in Legal Requirements Acquisition: A Tool-supported, Frame-Based Approach (TDB), pp. 225–230.
CASECASE-2008-WengF #algorithm #evolution #problem #scheduling
Self evolution algorithm for common due date scheduling problem (WW, SF), pp. 790–795.
CASECASE-2007-JinBS #approach
A Consolidated Approach to Minimize Semiconductor Production Loss Due to Unscheduled ATE Downtime (TJ, FB, CHS), pp. 188–193.
DACDAC-2007-KimJH #estimation #monte carlo #performance
Fast, Non-Monte-Carlo Estimation of Transient Performance Variation Due to Device Mismatch (JK, KDJ, MAH), pp. 440–443.
DACDAC-2007-SundaresanM #analysis #distributed
An Analysis of Timing Violations Due to Spatially Distributed Thermal Effects in Global Wires (KS, NRM), pp. 515–520.
ICALPICALP-2007-BansalCP #algorithm #scheduling
Competitive Algorithms for Due Date Scheduling (NB, HLC, KP), pp. 28–39.
CASECASE-2006-LuL #evaluation #independence #reliability #safety
Reliability evaluation of standby safety systems due to independent and common cause failures (LL, GL), pp. 264–269.
DATEDATE-2006-RosselloS #fault #identification
A compact model to identify delay faults due to crosstalk (JLR, JS), pp. 902–906.
DATEDATE-2005-CarterOS #concurrent #fault #modelling #testing
Circuit-Level Modeling for Concurrent Testing of Operational Defects due to Gate Oxide Breakdown (JRC, SO, DJS), pp. 300–305.
DACDAC-2003-Heydari
Characterizing the effects of clock jitter due to substrate noise in discrete-time D/S modulators (PH), pp. 532–537.
ICDARICDAR-2003-GrecoILSS
Bank-check Processing System: Modifications Due to the New European Currency (NG, DI, MGL, AS, LS), pp. 343–348.
DACDAC-2002-ChenMB02a
Coping with buffer delay change due to power and ground noise (LHC, MMS, FB), pp. 860–865.
DATEDATE-2002-FavalliM #fault #problem #self
Problems Due to Open Faults in the Interconnections of Self-Checking Data-Paths (MF, CM), pp. 612–617.
HCIHCI-CCAD-1999-Conway
Compensable injuries due to repetitive motion in computerized office work (FTC), pp. 961–965.
DACDAC-1997-DartuP #worst-case
Calculating Worst-Case Gate Delays Due to Dominant Capacitance Coupling (FD, LTP), pp. 46–51.
ICDARICDAR-1993-TakeshitaNK #bias #distance #on the
On the bias of Mahalanobis distance due to limited sample size effect (TT, SN, FK), pp. 171–174.
DACDAC-1985-Tendolkar #analysis #fault #random
Analysis of timing failures due to random AC defects in VLSI modules (NNT), pp. 709–714.
DACDAC-1983-LiuA #bound
Bounds on the saved area ratio due to PLA folding (WL, DEA), pp. 538–544.
VLDBVLDB-1976-Su #database
Application Program Conversion due to Data Base Changes (SYWS), pp. 143–157.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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