3 papers:
DATE-2011-HeGO #design #energy- Controlled timing-error acceptance for low energy IDCT design (KH, AG, MO), pp. 758–763.
- DATE-1998-SchneiderKHD #algorithm #architecture #comparison #hardware
- From Algorithms to Hardware Architectures: A Comparison of Regular and Irregular Structured IDCT Algorithms (CS, MK, TH, JD), pp. 186–190.
DAC-1997-XanthopoulosYC #architecture #case study #estimation #using- Architectural Exploration Using Verilog-Based Power Estimation: A Case Study of the IDCT (TX, YY, AC), pp. 415–420.
