Architectural Exploration Using Verilog-Based Power Estimation: A Case Study of the IDCT
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Thucydides Xanthopoulos, Yoshifumi Yaoi, Anantha Chandrakasan
Architectural Exploration Using Verilog-Based Power Estimation: A Case Study of the IDCT
DAC, 1997.

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@inproceedings{DAC-1997-XanthopoulosYC,
	author        = "Thucydides Xanthopoulos and Yoshifumi Yaoi and Anantha Chandrakasan",
	booktitle     = "{Proceedings of the 34th Design Automation Conference}",
	doi           = "10.1145/266021.266184",
	isbn          = "0-89791-920-3",
	pages         = "415--420",
	publisher     = "{ACM Press}",
	title         = "{Architectural Exploration Using Verilog-Based Power Estimation: A Case Study of the IDCT}",
	year          = 1997,
}

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