BibSLEIGH
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Used together with:
technolog (4)
base (3)
grid (2)
glitch (2)
gate (2)

Stem mapper$ (all stems)

7 papers:

SIGMODSIGMOD-2015-WangXLCH #grid #migration #smarttech
QMapper for Smart Grid: Migrating SQL-based Application to Hive (YW, YX, YL, JC, SH), pp. 647–658.
DACDAC-2007-ChengCW #named #power management
GlitchMap: An FPGA Technology Mapper for Low Power Considering Glitches (LC, DC, MDFW), pp. 318–323.
SIGMODSIGMOD-2007-LinskeyP #architecture #relational
An in-depth look at the architecture of an object/relational mapper (PCL, MP), pp. 889–894.
HPDCHPDC-2002-AllcockBBFGILP #behaviour #distributed #named #scalability #visualisation
GridMapper: A Tool for Visualizing the Behavior of Large-Scale Distributed Systems (WEA, JB, JB, ITF, JG, JAI, JML, MEP), pp. 179–187.
DACDAC-1992-KungDNG #algorithm #named
BDDMAP: A Technology Mapper Based on a New Covering Algorithm (DSK, RFD, TAN, DJG), pp. 484–487.
DACDAC-1991-Karplus #array #named #programmable
Xmap: A Technology Mapper for Table-Lookup Field-Programmable Gate Arrays (KK), pp. 240–243.
DACDAC-1991-Karplus91a #array #named #programmable
Amap: A Technology Mapper for Selector-Based Field-Programmable Gate Arrays (KK), pp. 244–247.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.