BibSLEIGH corpus
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Used together with:
perform (4)
ultra (4)
design (4)
architectur (3)
analysi (3)

Stem sparc$ (all stems)

17 papers:

HPCAHPCA-2012-BensonCFHGNS #design #hardware #implementation #integration
Design, integration and implementation of the DySER hardware accelerator into OpenSPARC (JB, RC, CF, CHH, VG, TN, KS), pp. 115–126.
ECSAECSA-2008-FankamJBA #approach #architecture #database #ontology #semantics
Extending the ANSI/SPARC Architecture Database with Explicit Data Semantics: An Ontology-Based Approach (CF, SJ, LB, YAA), pp. 318–321.
CSCWCSCW-2008-BrushIT #named #product line
SPARCS: exploring sharing suggestions to enhance family connectedness (AJBB, KMI, KT), pp. 629–638.
DACDAC-2003-AndoYISAMMMOYSKYS #generative
A 1.3GHz fifth generation SPARC64 microprocessor (HA, YY, AI, IS, TA, KM, TM, TM, SO, HY, YS, AK, RY, HS), pp. 702–705.
DATEDATE-2003-PalermoSZ #architecture #embedded
Power-Performance System-Level Exploration of a MicroSPARC2-Based Embedded Architecture (GP, CS, VZ), pp. 20182–20187.
HPCAHPCA-2003-SakamotoKIAUMK #analysis #architecture #enterprise #performance
Microarchitecture and Performance Analysis of a SPARC-V9 Microprocessor for Enterprise Server Systems (MS, AK, AI, TA, HU, KM, YK), pp. 141–152.
DACDAC-1996-PopescuM #design #verification
Innovative Verification Strategy Reduces Design Cycle Time for High-End Sparc Processor (VP, BM), pp. 311–314.
CAD Methodology for the Design of UltraSPARC-I Microprocessor at Sun Microsystems Inc (AC, AA, JB, PD, PD, PD, MD, TD, MD, PF, OG, DG, SG, JI, LL, JM, MM, SM, PP, AP, RP, SR, NR, PS, SS, RS, BS, WV, MW, PY, RKY, JZ, GBZ), pp. 19–22.
UltraSPARC-I Emulation (JG, MB, DC, SC, PD, MD, ME, GF, TG, DG, RJ, MK, RK, MM, CN, SJNJ, TO, GP, CS, NS, JW, PW), pp. 13–18.
DACDAC-1995-TremblayMIK #analysis #architecture #flexibility #performance #trade-off
A Fast and Flexible Performance Simulator for Micro-Architecture Trade-off Analysis on UltraSPARC-I (MT, GM, AI, LK), pp. 2–6.
DACDAC-1995-YangGMJL #design
System Design Methodology of UltraSPARC-I (LY, DG, JM, RJ, PL), pp. 7–12.
AdaEuropeAdaEurope-1995-BattiniMM #ada #evaluation
Evaluation of a SPARC Board Equipped with the Ada Tasking Coprocessor (ATAC) (FB, PLM, MM), pp. 379–388.
HPDCHPDC-1992-MinnichP #simulation
A Radiative Heat Transfer Simulation on a SPARCStation Farm (RM, DVP), pp. 124–132.
ASPLOSASPLOS-1991-CmelikKDK #analysis #benchmark #metric #set #specification
An Analysis of SPARC and MIPS Instruction Set Utilization on the SPEC Benchmarks (RFC, SIK, DRD, EJK), pp. 290–302.
ASPLOSASPLOS-1991-LeeKB #float #performance
The Floating-Point Performance of a Superscalar SPARC Processor (RLL, AYK, FAB), pp. 28–37.
VLDBVLDB-1978-Manola #database #framework #on the
On Relating the CODASYL Database Languages and the ANSI/SPARC Framework (FM), p. 132.
VLDBVLDB-1977-KlugT #framework #multi
Multiple View Support within the ANSI/SPARC Framework (ACK, DT), pp. 477–488.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.