David R. Ditzel, Lloyd Dickman
Proceedings of the First Symposium on Architectural Support for Programming Languages and Operating Systems
ASPLOS, 1982.

@proceedings{ASPLOS-1982,
	acmid         = "800050",
	address       = "Palo Alto, California, USA",
	editor        = "David R. Ditzel and Lloyd Dickman",
	isbn          = "0-89791-066-4",
	publisher     = "{ACM Press}",
	title         = "{Proceedings of the First Symposium on Architectural Support for Programming Languages and Operating Systems}",
	volume        = "SIGARCH Computer Architecture News 10(2), SIGPLAN Notices 17(4)",
	year          = 1982,
}

Contents (26 items)

8 ×#architecture
5 ×#hardware
3 ×#compilation
3 ×#memory management
3 ×#performance
3 ×#set
2 ×#analysis
2 ×#empirical
2 ×#execution
2 ×#guidelines

ASPLOS-1982-Rattner #hardware

Hardware/Software Cooperation in the iAPX-423 (JRR), p. 1.

ASPLOS-1982-HennessyJBGG #hardware #performance #trade-off

Hardware/Software Tradeoffs for Increased Performance (JLH, NPJ, FB, TRG, JG), pp. 2–11.

ASPLOS-1982-Rymarczyk #guidelines #pipes and filters

Coding Guidelines for Pipelined Processors (JWR), pp. 12–19.

ASPLOS-1982-JohnssonW #architecture #overview

An Overview of the Mesa Processor Architecture (RKJ, JDW), pp. 20–29.

ASPLOS-1982-BerenbaumCL #operating system

The Operating System and Language Support Features of the BELLMAC-32 Microprocessor (ADB, MWC, PML), pp. 30–38.

ASPLOS-1982-Radin

The 801 Minicomputer (GR), pp. 39–47.

ASPLOS-1982-DitzelM #c #for free #stack

Register Allocation for Free: The C Machine Stack Cache (DRD, HRM), pp. 48–56.

ASPLOS-1982-Harbison #architecture #compilation #optimisation

An Architectural Alternative to Optimizing Compilers (SPH), pp. 57–65.

ASPLOS-1982-Lampson #performance

Fast Procedure Calls (BWL), pp. 66–76.

ASPLOS-1982-Jones #design

Systematic Protection Mechanism Design (DWJ), pp. 77–80.

ASPLOS-1982-Reed #memory management #on the

On a General Property of Memory Mapping Tables (KR), pp. 81–86.

ASPLOS-1982-CookD #empirical

An Experiment to Improve Operand Addressing (RPC, ND), pp. 87–91.

ASPLOS-1982-FusaokaH #compilation #hardware #implementation

Compiler Chip: A Hardware Implementation of Compiler (AF, MH), pp. 92–95.

ASPLOS-1982-RauGG #architecture #generative #performance

Architectural Support for the Efficient Generation of Code for Horizontal Architectures (BRR, CDG, EMG), pp. 96–99.

ASPLOS-1982-McLearST #guidelines

Guidelines for Creating a Debuggable Processor (REM, DMS, ET), pp. 100–106.

ASPLOS-1982-Wilkes #hardware #implementation #memory management

Hardware Support for Memory Protection: Capability Implementations (MVW), pp. 107–116.

ASPLOS-1982-PollackCHKLR #ada #memory management

Supporting Ada Memory Management in the iAPX-432 (FJP, GWC, DWH, KCK, KKL, JRR), pp. 117–131.

ASPLOS-1982-SansonnetCPBP #architecture #execution #lisp

Direct Execution of Lisp on a List-Directed Architecture (JPS, MC, CP, DB, JP), pp. 132–139.

ASPLOS-1982-Johnson #architecture #debugging #requirements

Some Requirements for Architectural Support of Software Debugging (MSJ), pp. 140–148.

ASPLOS-1982-Middleburg #architecture #code generation

The Effect of the PDP-11 Architecture on Code Generation for Chill (CAM), pp. 149–157.

ASPLOS-1982-SweetS #analysis #empirical #set

Empirical Analysis of the Mesa Instruction Set (RES, JGSJ), pp. 158–166.

ASPLOS-1982-McDaniel #analysis #set #using

An Analysis of a Mesa Instruction Set Using Dynamic Instruction Frequencies (GM), pp. 167–176.

ASPLOS-1982-Wiecek #case study #compilation #execution #set

A Case Study of VAX-11 Instruction Set Usage for Compiler Execution (CAW), pp. 177–184.

ASPLOS-1982-MaekawaSI #architecture #migration #monitoring

Firmware Structure and Architectural Support for Monitors, Vertical Migration and User Microprogramming (MM, KS, CI), pp. 185–194.

ASPLOS-1982-KamibayashiONA #named #operating system

Heart: An Operating System Nucleus Machine Implemented by Firmware (NK, HO, KN, HA), pp. 195–204.

ASPLOS-1982-AhujaA #architecture #communication #hardware #multi #scheduling

A Multi-Microprocessor Architecture with Hardware Support for Communication and Scheduling (SA, AA), pp. 205–209.