On the Temporal Equivalence of Sequential Circuits
BibSLEIGH corpus
BibSLEIGH tags
BibSLEIGH bundles
BibSLEIGH people
EDIT!
CC-BY
Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
email twitter

Narendra V. Shenoy, Kanwar Jit Singh, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
On the Temporal Equivalence of Sequential Circuits
DAC, 1992.

DAC 1992
DBLP
Scholar
Full names Links ISxN
@inproceedings{DAC-1992-ShenoySBS,
	acmid         = "113938.149549",
	author        = "Narendra V. Shenoy and Kanwar Jit Singh and Robert K. Brayton and Alberto L. Sangiovanni-Vincentelli",
	booktitle     = "{Proceedings of the 29th Design Automation Conference}",
	isbn          = "0-8186-2822-7",
	pages         = "405--409",
	publisher     = "{IEEE Computer Society Press}",
	title         = "{On the Temporal Equivalence of Sequential Circuits}",
	year          = 1992,
}

Tags:



Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.