Travelled to:7 × USA
Collaborated with:A.L.Sangiovanni-Vincentelli W.Nicholls R.K.Brayton J.Kawa R.Camposano H.Zhou M.Kawarabayashi K.J.Singh R.Murgai Y.Nishizaki C.Chan D.Hanford J.Y.Pan M.Mehendale A.Vasudevan S.Wei
Talks about:programm (2) design (2) gate (2) resynthesi (1) crosstalk (1) techniqu (1) synthesi (1) sequenti (1) fixpoint (1) pipelin (1)
Person: Narendra V. Shenoy
DBLP: Shenoy:Narendra_V=
Contributed to:
2004200320022001199319921990Wrote 8 papers:
- DAC-2004-ShenoyKC #automation #design #programmable
- Design automation for mask programmable fabrics (NVS, JK, RC), pp. 192–197.
- DAC-2003-ChanHPSMVW #design
- Emerging markets: design goes global (CFC, DH, JYP, NVS, MM, AV, SW), p. 195.
- DAC-2002-ShenoyN #database #performance
- An efficient routing database (NVS, WN), pp. 590–595.
- DAC-2001-ZhouSN #analysis #fixpoint
- Timing Analysis with Crosstalk as Fixpoints on Complete Lattice (HZ, NVS, WN), pp. 714–719.
- DAC-1993-KawarabayashiSS #verification
- A Verification Technique for Gated Clock (MK, NVS, ALSV), pp. 123–127.
- DAC-1993-ShenoyBS #multi #pipes and filters
- Resynthesis of Multi-Phase Pipelines (NVS, RKB, ALSV), pp. 490–496.
- DAC-1992-ShenoySBS #equivalence #on the
- On the Temporal Equivalence of Sequential Circuits (NVS, KJS, RKB, ALSV), pp. 405–409.
- DAC-1990-MurgaiNSBS #array #logic #programmable #synthesis
- Logic Synthesis for Programmable Gate Arrays (RM, YN, NVS, RKB, ALSV), pp. 620–625.