BibSLEIGH — Statistical timing analysis in sequential circuit for on-chip global interconnect pipelining

Lizheng Zhang, Yuhen Hu, Charlie Chung-Ping Chen
Statistical timing analysis in sequential circuit for on-chip global interconnect pipelining
DAC, 2004.

DAC 2004

@inproceedings{DAC-2004-ZhangHC,
	author        = "Lizheng Zhang and Yuhen Hu and Charlie Chung-Ping Chen",
	booktitle     = "{Proceedings of the 41st Design Automation Conference}",
	doi           = "10.1145/996566.996806",
	isbn          = "1-58113-828-8",
	pages         = "904--907",
	publisher     = "{ACM}",
	title         = "{Statistical timing analysis in sequential circuit for on-chip global interconnect pipelining}",
	year          = 2004,
}

Lizheng Zhang, Yuhen Hu, Charlie Chung-Ping ChenStatistical timing analysis in sequential circuit for on-chip global interconnect pipeliningDAC, 2004.

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Lizheng Zhang, Yuhen Hu, Charlie Chung-Ping Chen
Statistical timing analysis in sequential circuit for on-chip global interconnect pipelining
DAC, 2004.