Improving the Process-Variation Tolerance of Digital Circuits Using Gate Sizing and Statistical Techniques
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Osama Neiroukh, Xiaoyu Song
Improving the Process-Variation Tolerance of Digital Circuits Using Gate Sizing and Statistical Techniques
DATE, 2005.

DATE 2005
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@inproceedings{DATE-2005-NeiroukhS,
	author        = "Osama Neiroukh and Xiaoyu Song",
	booktitle     = "{Proceedings of the Ninth Conference on Design, Automation and Test in Europe}",
	doi           = "10.1109/DATE.2005.180",
	isbn          = "0-7695-2288-2",
	pages         = "294--299",
	publisher     = "{IEEE Computer Society}",
	title         = "{Improving the Process-Variation Tolerance of Digital Circuits Using Gate Sizing and Statistical Techniques}",
	year          = 2005,
}

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