Hierarchy-aware and area-efficient test infrastructure design for core-based system chips
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Anuja Sehgal, Sandeep Kumar Goel, Erik Jan Marinissen, Krishnendu Chakrabarty
Hierarchy-aware and area-efficient test infrastructure design for core-based system chips
DATE, 2006.

DATE 2006
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@inproceedings{DATE-2006-SehgalGMC,
	author        = "Anuja Sehgal and Sandeep Kumar Goel and Erik Jan Marinissen and Krishnendu Chakrabarty",
	booktitle     = "{Proceedings of the 10th Conference on Design, Automation and Test in Europe}",
	doi           = "10.1145/1131561",
	pages         = "285--290",
	publisher     = "{European Design and Automation Association, Leuven, Belgium}",
	title         = "{Hierarchy-aware and area-efficient test infrastructure design for core-based system chips}",
	year          = 2006,
}

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