BibSLEIGH — A novel DRAM architecture as a low leakage alternative for SRAM caches in a 3D interconnect context

Anselme Vignon, Stefan Cosemans, Wim Dehaene, Pol Marchal, Marco Facchini
A novel DRAM architecture as a low leakage alternative for SRAM caches in a 3D interconnect context
DATE, 2009.

DATE 2009

@inproceedings{DATE-2009-VignonCDMF,
	author        = "Anselme Vignon and Stefan Cosemans and Wim Dehaene and Pol Marchal and Marco Facchini",
	booktitle     = "{Proceedings of the 13th Conference on Design, Automation and Test in Europe}",
	pages         = "929--933",
	publisher     = "{IEEE}",
	title         = "{A novel DRAM architecture as a low leakage alternative for SRAM caches in a 3D interconnect context}",
	year          = 2009,
}

Anselme Vignon, Stefan Cosemans, Wim Dehaene, Pol Marchal, Marco FacchiniA novel DRAM architecture as a low leakage alternative for SRAM caches in a 3D interconnect contextDATE, 2009.

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Anselme Vignon, Stefan Cosemans, Wim Dehaene, Pol Marchal, Marco Facchini
A novel DRAM architecture as a low leakage alternative for SRAM caches in a 3D interconnect context
DATE, 2009.