D-MRAM cache: enhancing energy efficiency with 3T-1MTJ DRAM/MRAM hybrid memory
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Hiroki Noguchi, Kumiko Nomura, Keiko Abe, Shinobu Fujita, Eishi Arima, Kyundong Kim, Takashi Nakada, Shinobu Miwa, Hiroshi Nakamura
D-MRAM cache: enhancing energy efficiency with 3T-1MTJ DRAM/MRAM hybrid memory
DATE, 2013.

DATE 2013
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@inproceedings{DATE-2013-NoguchiNAFAKNMN,
	acmid         = "2485716",
	author        = "Hiroki Noguchi and Kumiko Nomura and Keiko Abe and Shinobu Fujita and Eishi Arima and Kyundong Kim and Takashi Nakada and Shinobu Miwa and Hiroshi Nakamura",
	booktitle     = "{Proceedings of the 17th Conference on Design, Automation and Test in Europe}",
	isbn          = "978-1-4503-2153-2",
	pages         = "1813--1818",
	publisher     = "{EDA Consortium San Jose, CA, USA / ACM DL}",
	title         = "{D-MRAM cache: enhancing energy efficiency with 3T-1MTJ DRAM/MRAM hybrid memory}",
	year          = 2013,
}

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