Vijay S. Pai, Parthasarathy Ranganathan, Sarita V. Adve
The Impact of Instruction-Level Parallelism on Multiprocessor Performance and Simulation Methodology
HPCA, 1997.
@inproceedings{HPCA-1997-PaiRA,
author = "Vijay S. Pai and Parthasarathy Ranganathan and Sarita V. Adve",
booktitle = "{Proceedings of the Third International Symposium on High-Performance Computer Architecture}",
doi = "10.1109/HPCA.1997.569611",
isbn = "0-8186-7764-3",
pages = "72--83",
publisher = "{IEEE Computer Society}",
title = "{The Impact of Instruction-Level Parallelism on Multiprocessor Performance and Simulation Methodology}",
year = 1997,
}











