Travelled to:
1 × France
1 × Germany
1 × Turkey
1 × United Kingdom
14 × USA
Collaborated with:
H.Sung V.S.Pai P.Ranganathan V.S.Adve P.Ramachandran S.K.S.Hari H.Boehm R.Komuravelli M.Li J.Manson W.Pugh R.Sasanka C.J.Hughes M.Durbhakula Y.Zhou H.Naeimi K.Gharachorloo L.A.Barroso H.Abdel-Shafi J.Hall T.Harton R.L.B.Jr. S.Heumann S.Misailovic U.R.Karpuzcu A.L.Cox S.Dwarkadas R.Rajamony W.Zwaenepoel S.K.Sahoo N.Honarmand A.Welc T.Shpeisman X.Li Z.Li F.M.David P.Zhou S.Kumar Abdulrahman Mahmoud Radha Venkatagiri Khalique Ahmed D.Marinov C.W.Fletcher A.Pellegrini R.Smolinski L.Chen X.Fu J.Jiang T.M.Austin V.Bertacco D.Gizopoulos M.Psarakis D.J.Sorin A.Meixner A.Biswas X.Vera D.Dig J.Overbey P.Simmons M.Vakilian H.Sharif Prakalp Srivastava Muhammad Huzaifa Maria Kotsifakou Keyur Joshi Yasmin Sarita Nathan Zhao
Talks about:
memori (7) processor (4) hardwar (4) system (4) model (4) level (4) fault (4) multiprocessor (3) parallel (3) perform (3)
Person: Sarita V. Adve
DBLP: Adve:Sarita_V=
Facilitated 1 volumes:
Contributed to:
Wrote 21 papers:
- ASPLOS-2015-SungA #named #performance
- DeNovoSync: Efficient Support for Arbitrary Synchronization without Writer-Initiated Invalidations (HS, SVA), pp. 545–559.
- ASPLOS-2013-SungKA #hardware #named #nondeterminism #performance
- DeNovoND: efficient hardware support for disciplined non-determinism (HS, RK, SVA), pp. 13–26.
- ASPLOS-2012-HariANR #equivalence #fault #named
- Relyzer: exploiting application-level fault equivalence to analyze application resiliency to transient faults (SKSH, SVA, HN, PR), pp. 123–134.
- DATE-2012-PellegriniSCFHJAAB #evaluation
- CrashTest’ing SWAT: Accurate, gate-level evaluation of symptom-based resiliency solutions (AP, RS, LC, XF, SKSH, JJ, SVA, TMA, VB), pp. 1106–1109.
- DATE-2011-GizopoulosPARHSMBV #architecture #detection #fault #manycore #online
- Architectures for online error detection and recovery in multicore processors (DG, MP, SVA, PR, SKSH, DJS, AM, AB, XV), pp. 533–538.
- POPL-2011-BocchinoHHAAWS #nondeterminism #parallel
- Safe nondeterminism in a deterministic-by-default parallel language (RLBJ, SH, NH, SVA, VSA, AW, TS), pp. 535–548.
- HPCA-2009-LiRKHA #architecture #fault #hardware #modelling
- Accurate microarchitecture-level fault modeling for studying hardware faults (MLL, PR, URK, SKSH, SVA), pp. 105–116.
- OOPSLA-2009-BocchinoADAHKOSSV #java #parallel
- A type and effect system for deterministic parallel Java (RLBJ, VSA, DD, SVA, SH, RK, JO, PS, HS, MV), pp. 97–116.
- ASPLOS-2008-LiRSAAZ #comprehension #design #fault
- Understanding the propagation of hard errors to software and implications for resilient system design (MLL, PR, SKS, SVA, VSA, YZ), pp. 265–276.
- PLDI-2008-BoehmA #c++ #concurrent #memory management
- Foundations of the C++ concurrency memory model (HJB, SVA), pp. 68–78.
- POPL-2005-MansonPA #java #memory management
- The Java memory model (JM, WP, SVA), pp. 378–391.
- ASPLOS-2004-LiLDZZAK #energy #in memory #memory management #performance
- Performance directed energy management for main memory and disks (XL, ZL, FMD, PZ, YZ, SVA, SK), pp. 271–283.
- ASPLOS-2002-SasankaHA #adaptation #energy #hardware
- Joint local and global hardware adaptations for energy (RS, CJH, SVA), pp. 144–155.
- HPCA-1999-DurbhakulaPA #multi #simulation #trade-off
- Improving the Accuracy vs. Speed Tradeoff for Simulating Shared-Memory Multiprocessors with ILP Processors (MD, VSP, SVA), pp. 23–32.
- ASPLOS-1998-RanganathanGAB #database #performance
- Performance of Database Workloads on Shared-Memory Systems with Out-of-Order Processors (PR, KG, SVA, LAB), pp. 307–318.
- HPCA-1997-Abdel-ShafiHAA #communication #evaluation #multi
- An Evaluation of Fine-Grain Producer-Initiated Communication in Cache-Coherent Multiprocessors (HAS, JH, SVA, VSA), pp. 204–215.
- HPCA-1997-PaiRA #parallel #performance #simulation
- The Impact of Instruction-Level Parallelism on Multiprocessor Performance and Simulation Methodology (VSP, PR, SVA), pp. 72–83.
- ASPLOS-1996-PaiRAH #consistency #evaluation #memory management #modelling
- An Evaluation of Memory Consistency Models for Shared-Memory Systems with ILP Processors (VSP, PR, SVA, TH), pp. 12–23.
- HPCA-1996-AdveCDRZ #comparison #consistency #implementation #lazy evaluation
- A Comparison of Entry Consistency and Lazy Release Consistency Implementations (SVA, ALC, SD, RR, WZ), pp. 26–37.
- OOPSLA-2019-SharifSHKJSZAMA #compilation #information retrieval #named #optimisation
- ApproxHPVM: a portable compiler IR for accuracy-aware optimizations (HS, PS, MH, MK, KJ, YS, NZ, VSA, SM, SVA), p. 30.
- ASPLOS-2019-MahmoudVAMMFA #adaptation #fault #hardware #named #testing
- Minotaur: Adapting Software Testing Techniques for Hardware Errors (AM, RV, KA, SM, DM, CWF, SVA), pp. 1087–1103.