Travelled to:1 × Austria
1 × China
1 × United Kingdom
9 × USA
Collaborated with:S.V.Adve N.P.Jouppi V.S.Pai J.Chang C.Kozyrakis C.Bash K.Leigh J.Subhlok P.Banerjee C.D.Patel S.Rivoire M.A.Shah K.Gharachorloo L.A.Barroso T.Harton Grant Ayers H.Litz R.Raghavendra V.Talwar Z.Wang X.Zhu T.Harter S.Vroegindeweij E.Geelhoed M.Manahan J.Meza A.Shah R.Shih D.H.Yoon N.Muralimanohar M.Erez K.T.Lim Y.Turner J.R.Santos A.AuYoung T.F.Wenisch A.Lottarini A.Ramírez J.Coburn M.A.Kim D.Stodolsky Mark Wachsler Amirali Boroumand S.Ghose Y.Kim R.Ausavarungnirun Eric Shiu Rahul Thakur D.Kim Aki Kuusela A.Knies O.Mutlu Varun Sakalkar V.Kontorinis David Landhuis Shaohong Li Darren De Ronde Thomas Blooming Anand Ramesh James Kennedy Christopher Malone Jimmy Clidaras H. Andrés Lagar-Cavilla J.Ahn Suleiman Souhlal N.Agarwal Radoslaw Burny Shakeel Butt Ashwin Chaugule Nan Deng Junaid Shahid Greg Thelen Kamil Adam Yurtsever Y.Zhao
Talks about:memori (7) system (4) power (4) data (4) implic (3) center (3) level (3) evalu (3) architectur (2) processor (2)
Person: Parthasarathy Ranganathan
DBLP: Ranganathan:Parthasarathy
Contributed to:
2012
20122011
200920082008
20072005
2004199819971996201820192020Wrote 17 papers:
- ASPLOS-2012-ChangMRSSB #design #lifecycle
- Totally green: evaluating and designing servers for lifecycle environmental impact (JC, JM, PR, AS, RS, CB), pp. 25–36.
- HPCA-2012-LimTSACRW #memory management
- System-level implications of disaggregated memory (KTL, YT, JRS, AA, JC, PR, TFW), pp. 189–200.
- HPCA-2011-YoonMCRJE #fault #memory management #named
- FREE-p: Protecting non-volatile memory against both hard and soft errors (DHY, NM, JC, PR, NPJ, ME), pp. 466–477.
- DAC-2009-BanerjeePBR
- Sustainable data centers: enabled by supply and demand side management (PB, CDP, CB, PR), pp. 884–887.
- ASPLOS-2008-RaghavendraRTWZ #coordination #multi #power management
- No “power” struggles: coordinated multi-level power management for the data center (RR, PR, VT, ZW, XZ), pp. 48–59.
- HPCA-2008-LeighRS #architecture #convergence
- Fabric convergence implications on systems architecture (KL, PR, JS), pp. 15–26.
- SIGMOD-2007-RivoireSRK #benchmark #energy #metric #named
- JouleSort: a balanced energy-efficiency benchmark (SR, MAS, PR, CK), pp. 365–376.
- HPCA-2005-RanganathanJ #architecture #enterprise #research #roadmap
- Enterprise IT Trends and Implications for Architecture Research (PR, NPJ), pp. 253–256.
- CHI-2004-HarterVGMR #energy #evaluation #user interface
- Energy-aware user interfaces: an evaluation of user acceptance (TH, SV, EG, MM, PR), pp. 199–206.
- ASPLOS-1998-RanganathanGAB #database #performance
- Performance of Database Workloads on Shared-Memory Systems with Out-of-Order Processors (PR, KG, SVA, LAB), pp. 307–318.
- HPCA-1997-PaiRA #parallel #performance #simulation
- The Impact of Instruction-Level Parallelism on Multiprocessor Performance and Simulation Methodology (VSP, PR, SVA), pp. 72–83.
- ASPLOS-1996-PaiRAH #consistency #evaluation #memory management #modelling
- An Evaluation of Memory Consistency Models for Shared-Memory Systems with ILP Processors (VSP, PR, SVA, TH), pp. 12–23.
- ASPLOS-2018-BoroumandGKASTK #data flow
- Google Workloads for Consumer Devices: Mitigating Data Movement Bottlenecks (AB, SG, YK, RA, ES, RT, DK, AK, AK, PR, OM), pp. 316–331.
- ASPLOS-2018-LottariniRCKRSW #benchmark #in the cloud #metric #named #video
- vbench: Benchmarking Video Transcoding in the Cloud (AL, AR, JC, MAK, PR, DS, MW), pp. 797–809.
- ASPLOS-2019-Lagar-CavillaAS #memory management
- Software-Defined Far Memory in Warehouse-Scale Computers (HALC, JA, SS, NA, RB, SB, JC, AC, ND, JS, GT, KAY, YZ, PR), pp. 317–330.
- ASPLOS-2020-AyersLKR #data access #memory management
- Classifying Memory Access Patterns for Prefetching (GA, HL, CK, PR), pp. 513–526.
- ASPLOS-2020-SakalkarKLLRBRK
- Data Center Power Oversubscription with a Medium Voltage Power Plane and Priority-Aware Capping (VS, VK, DL, SL, DDR, TB, AR, JK, CM, JC, PR), pp. 497–511.