Travelled to:1 × France
2 × USA
Collaborated with:M.Marek-Sadowska A.Singh K.Wang L.H.Chen R.Sudhakar S.I.Long
Talks about:circuit (2) steer (2) wave (2) techniqu (1) synthesi (1) layout (1) latenc (1) ground (1) comput (1) compon (1)
Person: Arindam Mukherjee
DBLP: Mukherjee:Arindam
Contributed to:
2002
20011999Wrote 3 papers:
- DATE-2002-MukherjeeWCM #component
- Sizing Power/Ground Meshes for Clocking and Computing Circuit Components (AM, KW, LHC, MMS), pp. 176–183.
- DAC-2001-SinghMM #latency
- Latency and Latch Count Minimization in Wave Steered Circuits (AS, AM, MMS), pp. 383–388.
- DAC-1999-MukherjeeSML #layout #novel #synthesis
- Wave Steering in YADDs: A Novel Non-Iterative Synthesis and Layout Technique (AM, RS, MMS, SIL), pp. 466–471.