Travelled to:
1 × France
1 × Italy
1 × USA
Collaborated with:
S.Bartolini ∅ L.M.Ricciardi G.Prina A.Bardine M.Comparetti P.Foglia G.Gabrielli
Talks about:
system (3) cach (3) transform (2) techniqu (2) embed (2) multiprocessor (1) overhead (1) cachesim (1) support (1) suitabl (1)
Person: Cosimo Antonio Prete
DBLP: Prete:Cosimo_Antonio
Contributed to:
Wrote 5 papers:
- DATE-2009-BardineCFGP #migration #power management
- A power-efficient migration mechanism for D-NUCA caches (AB, MC, PF, GG, CAP), pp. 598–601.
- SCAM-2001-BartoliniP #embedded #performance
- An Object Level Transformation Technique to Improve the Performance of Embedded Applications (SB, CAP), pp. 26–34.
- SCAM-J-2001-BartoliniP02 #embedded #program transformation
- A cache-aware program transformation technique suitable for embedded systems (SB, CAP), pp. 783–795.
- PDP-1995-PreteRP #multi
- Reducing coherence-related overhead in multiprocessor systems (CAP, LMR, GP), pp. 444–451.
- CSEE-1994-Prete #education #named #visual notation
- Cachesim: A Graphical Software Environment to Support the Teaching of Computer Systems with Cache Memories (CAP), pp. 317–327.