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Travelled to:
1 × Germany
1 × USA
2 × France
Collaborated with:
S.A.Seshia B.A.Brady U.Rührmair W.Li
Talks about:
counterexampl (1) sequenti (1) abstract (1) perform (1) circuit (1) analysi (1) system (1) driven (1) design (1) buffer (1)

Person: Daniel E. Holcomb

DBLP DBLP: Holcomb:Daniel_E=

Contributed to:

DATE 20142014
DAC 20112011
DATE 20112011
DATE 20092009

Wrote 4 papers:

DATE-2014-RuhrmairH
PUFs at a glance (UR, DEH), pp. 1–6.
DAC-2011-HolcombBS #performance #verification
Abstraction-based performance verification of NoCs (DEH, BAB, SAS), pp. 492–497.
DATE-2011-BradyHS
Counterexample-guided SMT-driven optimal buffer sizing (BAB, DEH, SAS), pp. 329–334.
DATE-2009-HolcombLS #analysis #design #fault
Design as you see FIT: System-level soft error analysis of sequential circuits (DEH, WL, SAS), pp. 785–790.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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