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Travelled to:
2 × USA
Collaborated with:
B.Kwak M.R.Mercer
Talks about:
circuit (2) logic (2) statist (1) generat (1) system (1) effici (1) combin (1) calcul (1) power (1) optim (1)

Person: Eun Sei Park

DBLP DBLP: Park:Eun_Sei

Contributed to:

DAC 19981998
DAC 19901990

Wrote 2 papers:

DAC-1998-KwakP #estimation #fault #logic #statistics
An Optimization-Based Error Calculation for Statistical Power Estimation of CMOS Logic Circuits (BK, ESP), pp. 690–693.
DAC-1990-ParkM #generative #logic #performance #testing
An Efficient Delay Test Generation System for Combinational Logic Circuits (ESP, MRM), pp. 522–528.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.