Travelled to:
3 × USA
Collaborated with:
C.Tanaka S.Murai M.Kakinuma K.Sakaguchi M.Soga C.Tanaka K.Tabuchi K.Seo M.Kunioka T.Yahara K.Okazaki M.Terai R.Katoh M.Tachibana
Talks about:
system (3) design (3) comput (3) aid (2) masterslic (1) placement (1) procedur (1) hierarch (1) scheme (1) layout (1)
Person: Hiroo Tsuji
DBLP: Tsuji:Hiroo
Contributed to:
Wrote 3 papers:
- DAC-1981-TanakaMTYOTKT #array #design #layout
- An integrated computer aided design system for gate array masterslices: Part 2 the layout design system MARS-M3 (CT, SM, HT, TY, KO, MT, RK, MT), pp. 812–819.
- DAC-1979-MuraiTKST
- A hierarchical placement procedure with a simple blocking scheme (SM, HT, MK, KS, CT), pp. 18–23.
- DAC-1974-SogaTTSKT #data transformation #design
- Engineering Data Management System (EDMS) for computer aided design of digital computers (MS, CT, KT, KS, MK, HT), pp. 372–379.