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Travelled to:
2 × USA
Collaborated with:
T.Yahara T.Moriya C.Tanaka S.Murai H.Tsuji M.Terai R.Katoh M.Tachibana
Talks about:
system (2) design (2) masterslic (1) multipl (1) circuit (1) layout (1) integr (1) comput (1) simul (1) media (1)

Person: Kaoru Okazaki

DBLP DBLP: Okazaki:Kaoru

Contributed to:

DAC 19831983
DAC 19811981

Wrote 2 papers:

DAC-1983-OkazakiMY #multi
A multiple media delay simulator for MOS LSI circuits (KO, TM, TY), pp. 279–285.
DAC-1981-TanakaMTYOTKT #array #design #layout
An integrated computer aided design system for gate array masterslices: Part 2 the layout design system MARS-M3 (CT, SM, HT, TY, KO, MT, RK, MT), pp. 812–819.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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