3 × USA
H.Ozaki S.Tsukiyama E.S.Kuh N.Okuda T.Harada S.Tani I.Nishioka T.Kurimoto S.Yamamoto
wire (2) placement (1) multilay (1) approach (1) problem (1) portion (1) system (1) random (1) layout (1) assign (1)
Person: Isao Shirakawa
Wrote 3 papers:
- DAC-1981-TsukiyamaKS #multi #on the #problem
- On the layering problem of multilayer PWB wiring (ST, ESK, IS), pp. 738–745.
- DAC-1980-ShirakawaOHTO #layout #logic #random
- A layout system for the random logic portion of MOS LSI (IS, NO, TH, ST, HO), pp. 92–99.
- DAC-1978-NishiokaKYSO #approach
- An approach to gate assignment and module placement for printed wiring boards (IN, TK, SY, IS, HO), pp. 60–69.