Travelled to:1 × France
1 × USA
Collaborated with:S.Vasudevan S.N.Ahmadyan K.M.Butler H.Kim
Talks about:circuit (2) analog (2) use (2) nonlinear (1) increment (1) algorithm (1) stimulus (1) predict (1) generat (1) augment (1)
Person: Jayanand Asok Kumar
DBLP: Kumar:Jayanand_Asok
Contributed to:
2013
2012Wrote 3 papers:
- DATE-2013-AhmadyanKV #algorithm #incremental #runtime #using #verification
- Runtime verification of nonlinear analog circuits using incremental time-augmented RRT algorithm (SNA, JAK, SV), pp. 21–26.
- DAC-2012-AhmadyanKV #generative
- Goal-oriented stimulus generation for analog circuits (SNA, JAK, SV), pp. 1018–1023.
- DAC-2012-KumarBKV #analysis #predict #source code #using
- Early prediction of NBTI effects using RTL source code analysis (JAK, KMB, HK, SV), pp. 808–813.