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Travelled to:
1 × Germany
3 × France
4 × USA
Collaborated with:
S.N.Ahmadyan J.A.Kumar L.Liu V.Athavale P.Sagdeo D.Sheridan W.Tuohy S.Ma S.Hertz N.Ewalt D.Pal K.M.Butler H.Kim S.Kowshik C.Gu S.Natarajan E.Chiprout S.J.Patel D.Tcheng D.R.Johnson
Talks about:
use (7) analysi (6) generat (5) circuit (4) code (4) assert (3) analog (3) sourc (3) mine (3) rtl (3)

Person: Shobha Vasudevan

DBLP DBLP: Vasudevan:Shobha

Contributed to:

DATE 20152015
DAC 20142014
ASE 20132013
DATE 20132013
DAC 20122012
ASE 20112011
DATE 20112011
DATE 20102010

Wrote 11 papers:

DATE-2015-AhmadyanGNCV #analysis #diagrams #performance
Fast eye diagram analysis for high-speed CMOS circuits (SNA, CG, SN, EC, SV), pp. 1377–1382.
DAC-2014-AthavaleMHV #analysis #source code #test coverage #using
Code Coverage of Assertions Using RTL Source Code Analysis (VA, SM, SH, SV), p. 6.
ASE-2013-SagdeoEPV #automation #debugging #invariant #locality #testing #using
Using automatically generated invariants for regression testing and bug localization (PS, NE, DP, SV), pp. 634–639.
DATE-2013-AhmadyanKV #algorithm #incremental #runtime #using #verification
Runtime verification of nonlinear analog circuits using incremental time-augmented RRT algorithm (SNA, JAK, SV), pp. 21–26.
DATE-2013-AhmadyanV #analysis #reachability #reduction #set
Reachability analysis of nonlinear analog circuits through iterative reachable set reduction (SNA, SV), pp. 1436–1441.
DAC-2012-AhmadyanKV #generative
Goal-oriented stimulus generation for analog circuits (SNA, JAK, SV), pp. 1018–1023.
DAC-2012-KumarBKV #analysis #predict #source code #using
Early prediction of NBTI effects using RTL source code analysis (JAK, KMB, HK, SV), pp. 808–813.
ASE-2011-SagdeoAKV #clustering #invariant #named #using
PRECIS: Inferring invariants using program path guided clustering (PS, VA, SK, SV), pp. 532–535.
DATE-2011-LiuSTV #design #generative #towards #using #validation
Towards coverage closure: Using GoldMine assertions for generating design validation stimulus (LL, DS, WT, SV), pp. 173–178.
DATE-2011-LiuV #analysis #generative #performance #source code #validation
Efficient validation input generation in RTL by hybridized source code analysis (LL, SV), pp. 1596–1601.
DATE-2010-VasudevanSPTTJ #automation #data mining #generative #mining #named #static analysis #using
GoldMine: Automatic assertion generation using data mining and static analysis (SV, DS, SJP, DT, WT, DRJ), pp. 626–629.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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