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Travelled to:
1 × France
4 × USA
Collaborated with:
M.D.Hill D.A.Wood K.E.Moore A.M.Kumar V.Kamakoti M.J.Moravan M.Lupon L.Yen M.M.Swift M.R.Marty H.Volos B.Liblit
Talks about:
memori (5) transact (3) log (3) map (2) technolog (1) reconverg (1) algorithm (1) supervis (1) support (1) hardwar (1)

Person: Jayaram Bobba

DBLP DBLP: Bobba:Jayaram

Contributed to:

HPCA 20112011
HPCA 20072007
ASPLOS 20062006
HPCA 20062006
DATE v2 20042004

Wrote 5 papers:

HPCA-2011-BobbaLHW #memory management #performance
Safe and efficient supervised memory systems (JB, ML, MDH, DAW), pp. 369–380.
HPCA-2007-YenBMMVHSW #hardware #memory management #named #transaction
LogTM-SE: Decoupling Hardware Transactional Memory from Caches (LY, JB, MRM, KEM, HV, MDH, MMS, DAW), pp. 261–272.
ASPLOS-2006-MoravanBMYHLSW #memory management #transaction
Supporting nested transactional memory in logTM (MJM, JB, KEM, LY, MDH, BL, MMS, DAW), pp. 359–370.
HPCA-2006-MooreBMHW #memory management #named #transaction
LogTM: log-based transactional memory (KEM, JB, MJM, MDH, DAW), pp. 254–265.
DATE-v2-2004-KumarBK #algorithm #analysis #array #embedded #memory management #named #reduction #using
MemMap: Technology Mapping Algorithm for Area Reduction in FPGAs with Embedded Memory Arrays Using Reconvergence Analysis (AMK, JB, VK), pp. 922–929.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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