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Travelled to:
3 × USA
Collaborated with:
S.W.Chung F.Koushanfar P.K.Pendyala A.Sadeghi C.Wachsmann Y.Pan S.Ozdemir G.Memik
Talks about:
process (2) variat (2) base (2) microprocessor (1) processor (1) platform (1) wordlin (1) exploit (1) voltag (1) select (1)

Person: Joonho Kong

DBLP DBLP: Kong:Joonho

Contributed to:

DAC 20142014
DAC 20122012
DAC 20092009

Wrote 3 papers:

DAC-2014-KongKPSW #embedded #framework #named #novel #platform
PUFatt: Embedded Platform Attestation Based on Novel Processor-Based PUFs (JK, FK, PKP, ARS, CW), p. 6.
DAC-2012-KongC #3d #process
Exploiting narrow-width values for process variation-tolerant 3-D microprocessors (JK, SWC), pp. 1197–1206.
DAC-2009-PanKOMC #process
Selective wordline voltage boosting for caches to manage yield under process variations (YP, JK, SO, GM, SWC), pp. 57–62.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.