Travelled to:1 × Germany
Collaborated with:J.P.d.Gyvez S.Fabrie M.Vertregt Y.Pu M.Meijer
Talks about:synthesi (1) standard (1) frequenc (1) variabl (1) librari (1) voltag (1) design (1) ultra (1) toler (1) scale (1)
Person: Juan Diego Echeverri
DBLP: Echeverri:Juan_Diego
Contributed to:
2014Wrote 2 papers:
- DATE-2014-FabrieEVG #design #library #standard #variability
- Standard cell library tuning for variability tolerant designs (SF, JDE, MV, JPdG), pp. 1–6.
- DATE-2014-PuEMG #logic #power management #scalability #synthesis
- Logic synthesis of low-power ICs with ultra-wide voltage and frequency scaling (YP, JDE, MM, JPdG), pp. 1–2.