Travelled to:1 × Germany
2 × France
2 × USA
Collaborated with:C.Huang C.Liu Y.Chen J.Chen C.Chen B.Lee J.R.Jiang J.Jou W.Shen S.Chao
Talks about:decomposit (2) synthesi (2) minim (2) fpga (2) base (2) area (2) architectur (1) transistor (1) reconfigur (1) microfluid (1)
Person: Juinn-Dar Huang
DBLP: Huang:Juinn=Dar
Contributed to:
201520142011
19981995Wrote 5 papers:
- DATE-2015-HuangLH #multi
- Volume-oriented sample preparation for reactant minimization on flow-based microfluidic biochips with multi-segment mixers (CMH, CHL, JDH), pp. 1114–1119.
- DATE-2014-ChenCH #array #configuration management #constraints #synthesis
- Area minimization synthesis for reconfigurable single-electron transistor arrays with fabrication constraints (YHC, JYC, JDH), pp. 1–4.
- DATE-2011-ChenLH #3d #architecture #towards
- Architectural exploration of 3D FPGAs towards a better balance between area and delay (CIC, BCL, JDH), pp. 587–590.
- DAC-1998-JiangJH #composition #encoding #synthesis
- Compatible Class Encoding in Hyper-Function Decomposition for FPGA Synthesis (JHRJ, JYJ, JDH), pp. 712–717.
- DAC-1995-ShenHC #composition #set
- Lambda Set Selection in Roth-Karp Decomposition for LUT-Based FPGA Technology Mapping (WZS, JDH, SMC), pp. 65–69.