Travelled to:6 × USA
Collaborated with:T.Yahara T.Nagai H.Shimoyama M.Terai M.Ozaki K.Takahashi H.Kanada M.Watanabe M.Kakinuma M.Ikeda M.Tachibana
Talks about:layout (5) system (2) design (2) rout (2) grid (2) masterslic (1) constraint (1) placement (1) algorithm (1) horizont (1)
Person: Koji Sato
DBLP: Sato:Koji
Contributed to:
199019841982198119801979Wrote 6 papers:
- DAC-1990-TeraiTS #algorithm #assurance #constraints #design #layout
- A New Min-Cut Placement Algorithm for Timing Assurance Layout Design Meeting Net Length Constraint (MT, KT, KS), pp. 96–102.
- DAC-1984-OzakiWKIS #layout #named
- MGX: An integrated symbolic layout system for VLSI (MO, MW, MK, MI, KS), pp. 572–579.
- DAC-1982-TeraiKSY #layout
- A consideration of the number of horizontal grids used in the routing of a masterslice layout (MT, HK, KS, TY), pp. 121–128.
- DAC-1981-SatoNTSOY #layout #named
- MILD — A cell-based layout system for MOS-LSI (KS, TN, MT, HS, MO, TY), pp. 828–836.
- DAC-1980-SatoSNOY
- A “grid-free” channel router (KS, HS, TN, MO, TY), pp. 22–31.
- DAC-1979-SatoNSY #design #layout #named
- MIRAGE — a simple-model routing program for the hierarchical layout design of IC masks (KS, TN, HS, TY), pp. 297–304.