Travelled to:2 × USA
Collaborated with:W.Lue R.K.Chun K.Chang J.D.Bastian M.Ellement P.J.Fowler C.E.Huang
Talks about:schemat (2) circuit (2) symbol (2) list (2) net (2) transistor (1) placement (1) extractor (1) pattern (1) parasit (1)
Person: Lawrence P. McNamee
DBLP: McNamee:Lawrence_P=
Contributed to:
198919871983Wrote 4 papers:
- DAC-1989-LueM
- Extracting Schematic-like Information from CMOS Circuit Net-lists (WJL, LPM), pp. 690–693.
- DAC-1987-ChunCM #named
- VISION: VHDL Induced Schematic Imaging on Net-Lists (RKC, KJC, LPM), pp. 436–442.
- DAC-1987-LueM #game studies #layout #named
- PLAY: Pattern-Based Symbolic Cell Layout: Part I: Transistor Placement (WJL, LPM), pp. 659–665.
- DAC-1983-BastianEFHM #simulation #specification
- Symbolic Parasitic Extractor for Circuit Simulation (SPECS) (JDB, ME, PJF, CEH, LPM), pp. 346–352.