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Travelled to:
1 × Germany
2 × France
Collaborated with:
N.Concer S.Iamundo R.Mock T.S.Cinotti J.Reinschke
Talks about:
spidergon (2) network (2) chip (2) architectur (1) algorithm (1) interact (1) virtual (1) analysi (1) aequal (1) simul (1)

Person: Luciano Bononi

DBLP DBLP: Bononi:Luciano

Contributed to:

DATE 20132013
DATE 20092009
DATE Designers’ Forum 20062006

Wrote 3 papers:

DATE-2013-MockCRB #interactive #scalability
Interactions of large scale EV mobility and virtual power plants (RM, TSC, JR, LB), pp. 1725–1729.
DATE-2009-ConcerIB #algorithm #named #network #novel
aEqualized: A novel routing algorithm for the Spidergon Network On Chip (NC, SI, LB), pp. 749–754.
DATE-DF-2006-BononiC #2d #analysis #architecture #network #simulation
Simulation and analysis of network on chip architectures: ring, spidergon and 2D mesh (LB, NC), pp. 154–159.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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