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Travelled to:
1 × USA
Collaborated with:
F.N.Najm
Talks about:
circuit (1) switch (1) sensit (1) extrem (1) worst (1) delay (1) activ (1) vlsi (1) case (1)

Person: Michael Y. Zhang

DBLP DBLP: Zhang:Michael_Y=

Contributed to:

DAC 19951995

Wrote 1 papers:

DAC-1995-NajmZ #process #worst-case
Extreme Delay Sensitivity and the Worst-Case Switching Activity in VLSI Circuits (FNN, MYZ), pp. 623–627.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.