Travelled to:1 × China
1 × United Kingdom
2 × France
3 × USA
Collaborated with:F.J.Kurdahi M.D.Hill R.Bodík J.D.Lafferty K.El-Arini E.B.Fox C.Guestrin A.Krishnamurthy S.Balakrishnan A.Singh K.Sudan S.Balakrishnan S.Lie D.Mallick G.Lauterbach R.Balasubramonian
Talks about:architectur (2) synthesi (2) memori (2) lightweight (1) multivari (1) algorithm (1) serializ (1) hierarch (1) document (1) detector (1)
Person: Min Xu
DBLP: Xu:Min
Contributed to:
2013
2013
2012
2006
2005
19981997Wrote 8 papers:
- HPCA-2013-SudanBLXMLB #architecture #lightweight #novel #using #web
- A novel system architecture for web scale applications using lightweight CPUs and virtualized I/O (KS, SB, SL, MX, DM, GL, RB), pp. 167–178.
- KDD-2013-El-AriniXFG #documentation #representation
- Representing documents through their readers (KEA, MX, EBF, CG), pp. 14–22.
- ICML-2012-KrishnamurthyBXS #algorithm #clustering #performance
- Efficient Active Algorithms for Hierarchical Clustering (AK, SB, MX, AS), p. 39.
- ICML-2012-XuL #multi
- Conditional Sparse Coding and Grouped Multivariate Regression (MX, JDL), p. 116.
- ASPLOS-2006-XuHB #memory management #reduction #transitive
- A regulated transitive reduction (RTR) for longer memory race recording (MX, MDH, RB), pp. 49–60.
- PLDI-2005-XuBH #detection #source code
- A serializability violation detector for shared-memory server programs (MX, RB, MDH), pp. 1–14.
- DATE-1998-XuK #architecture #synthesis
- Layout-Driven High Level Synthesis for FPGA Based Architectures (MX, FJK), pp. 446–450.
- EDTC-1997-XuK #physics #synthesis
- RTL synthesis with physical and controller information (MX, FJK), pp. 299–303.